Electronic Design

Testbench Automation Tool Provides Tight Links To Verilog Simulation

Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, and a unified graphical environment for waveform analysis are all ...
EDN

SystemVerilog 3.1 adds assertions and testbench automation

The June 2003 release of SystemVerilog 3.1 integrates testbench automation capabilities and temporal assertions into an enhanced version of Verilog. It eliminates many of Verilog's past limitations, ...
Design-Reuse

Mentor Graphics Delivers Breakthrough in Verification Intelligence

Expands Questa Functional Verification Platform with Questa Multi-view Verification Components and inFact Intelligent Testbench Automation WILSONVILLE, Ore., Feb. 18, 2008 - Mentor Graphics ...
Electronic Design

Testbench Tool Exploits Distributed Compute Environments

Through an enhancement to inFact, Mentor Graphics’ intelligent testbench automation tool, large simulations can be automatically distributed across up to 1000 CPUs, extending non-redundant sequence ...
EDN

Mentor Graphics : Breakthrough in verification intelligence improves verification coverage

Mentor Graphics Corp. has announced the Questa® Multi-view Verification Components product and the inFact™ intelligent testbench automation tool – two new solutions that use breakthrough technologies ...